Systems and methods for reduced error detection latency using encoded data

摘要

A fault-tolerant data processing system includes first and second microcircuits in a master/checker configuration. The first and second microcircuits perform identical transforming operations on identical data to generate respective outputs. The internal state of each microcircuit is encoded to a short code word and communicated to an external comparator. The comparator compares the encoded internal state data of the first and second microcircuits to determine if an error has occurred. Low error detection latency may be realized due to increased frequency of error detection, with minimal hardware and performance overhead.