发明名称 Parallel variable bit encoder
摘要 A bit stuffing circuit has a first communication channel delivering data to a barrel shifter, the barrel shifter delivering a first number of bits from the first communication channel to a first output. A second output has a predetermined number of bits for transmission, the predetermined number of bits including the first number of bits from the barrel shifter output, and a second number of other bits from a second communications channel.
申请公布号 US6172626(B1) 申请公布日期 2001.01.09
申请号 US19990373668 申请日期 1999.08.13
申请人 CISCO TECHNOLOGY, INC. 发明人 MCDONNELL MICHAEL;SALEMI HOJJAT
分类号 H03M9/00;H04J3/07;H04Q11/04;(IPC1-7):H03M7/40 主分类号 H03M9/00
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