发明名称 |
Trenched DMOS device provided with body-dopant redistribution-compensation region for preventing punch through and adjusting threshold voltage |
摘要 |
This invention discloses a vertical DMOS transistor cell formed in a semiconductor substrate of a first conductivity type with a top surface and a bottom surface. The vertical DMOS transistor cell includes a trenched gate comprising polysilicon filling a trench opened from the top surface disposed substantially in a middle portion of the cell. The DMOS transistor cell further includes a source region of the first conductivity type surrounding the trenched gate near the top surface of the substrate. The DMOS transistor cell further includes a body region of a second conductivity type encompassing the source region. The body region surrounding the trenched gate and extends vertically to about one-half to two-third of the depth of the trenched gate. The body region further includes a body-dopant redistribution-compensation region under the source region near the trenched gate having a delta-increment body dopant concentration distribution higher than remaining portions of the body region. |
申请公布号 |
US6172398(B1) |
申请公布日期 |
2001.01.09 |
申请号 |
US19970132564 |
申请日期 |
1997.08.11 |
申请人 |
MAGEPOWER SEMICONDUCTOR CORP. |
发明人 |
HSHIEH FWU-IUAN |
分类号 |
H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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