Enhanced pulse width modulator

摘要

An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a first control signal and a second control signal in response to (i) a digital input signal and (ii) a clock signal. The second circuit may be configured to generate a third control signal by scrambling the first control signal. The third circuit may be configured to generate a pulse width modulated output signal in response to (i) the second control signal and (ii) the third control signal.