发明名称 Method for filling structural gaps and intergrated circuitry
摘要 A semiconductor processing method for filling structural gaps includes depositing a substantially boron free silicon oxide comprising material at a first average deposition rate over an exposed semiconductive material in a gap between wordline constructions and at a second average deposition rate less than the first average deposition rate over the wordline constructions. A reduced gap having a second aspect ratio less than or equal to a first aspect ratio of the original gap may be provided. An integrated circuit includes a pair of wordline constructions separated by a gap therebetween in areas where the wordline constructions do not cover an underlying semiconductive substrate. A layer of substantially boron free silicon oxide material has a first thickness over the substrate within the gap and has a second thickness less than the first thickness over the wordline constructions.
申请公布号 US6171948(B1) 申请公布日期 2001.01.09
申请号 US19990432496 申请日期 1999.11.02
申请人 MICRON TECHNOLOGY, INC. 发明人 HILL CHRIS W.
分类号 H01L21/316;(IPC1-7):H01L21/31 主分类号 H01L21/316
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