发明名称 Method for forming a multilevel interconnection with low contact resistance in a semiconductor device
摘要 A method for forming a multilevel interconnection between a polycide layer and a polysilicon layer is disclosed. The multilevel interconnection comprises: forming a first impurity-containing conductive layer on a semiconductor substrate; forming a first silicide layer, having a first region thinner than a second region, on the first impurity-containing conductive layer; forming an interlayer dielectric layer in other than the first region; forming a contact hole for exposing the first silicide layer of the first region; and connecting a second impurity-containing conductive layer to the first silicide layer through the contact hole.
申请公布号 US6171950(B1) 申请公布日期 2001.01.09
申请号 US19990330129 申请日期 1999.06.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE YONG-JAE;LEE SOO-CHEOL
分类号 H01L21/768;H01L21/336;H01L23/522;H01L23/532;H01L29/78;(IPC1-7):H01L21/476 主分类号 H01L21/768
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