| 摘要 |
The method of forming MOS transistors includes the following steps. First, isolation regions are formed in the semiconductor substrate to separate the semiconductor substrate into an ESD protective region and a functional region. A gate insulator layer is formed on the substrate and a polysilicon layer is formed on the gate insulator layer. The polysilicon layer is then patterned to form gate structures on the ESD protective region and the functional region. The semiconductor substrate is doped for forming a first doped region and an insulator layer is formed over the semiconductor substrate. A portion of the insulator layer and a portion of the gate insulator layer are removed to form spacer structures and an insulator block. The semiconductor substrate is doped for forming a second doped region. An insulator opening is defined within the insulator block. The semiconductor substrate is then doped for forming a third doped region. In the preferred embodiments, the third doped region has opposite type dopants with the second doped region and the first doped region. A first thermal annealing is then performed to the semiconductor substrate to drive in dopants. A metal layer is then formed on the semiconductor substrate and a second thermal annealing is performed to the semiconductor substrate to form a metal silicide layer on the gate structures, and on the substrate over the second doped region and the third doped region. Finally, unreacted portions of the metal layer are removed.
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