| 摘要 |
PURPOSE: A method for manufacturing electrically erasable programmable read only memory(EEPROM) is provided to reduce a channel length of a select transistor and a unit memory cell size, by controlling a punch-through of the select transistor without greatly increasing a threshold voltage of a sense transistor. CONSTITUTION: The first insulating layer(11) is formed in an active region of a semiconductor substrate(10) of the first conductivity type, and impurity ions of the first conductivity type is firstly injected into the surface of the substrate to control a threshold voltage of a sense transistor. High density cell diffusion region of the second conductivity type is formed in a region of the substrate. A tunnelling oxidation layer(15) is formed on the cell diffusion region. A floating gate pattern and an interlayer dielectric pattern are sequentially formed on the tunnelling oxidation layer. Impurity ions of the first conductivity type for increasing a surface density of the substrate are secondly injected using the floating gate pattern as a mask. The second insulating layer which is a gate insulating layer for a select transistor, is formed in the substrate outside the floating gate pattern. A control gate pattern is formed on the interlayer dielectric pattern while a gate pattern of the select transistor is selectively formed on the second insulating layer. Impurity ions of the second conductivity type for a diffusion region of a high breakdown voltage are thirdly injected, using the floating gate pattern and gate electrode pattern as a mask layer.
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