发明名称 CIRCUIT FOR INPUTTING PHASE LOCKED DATA INTO TWO PHASE LOCKED LOOP CHIPS USING ONE PROCESSOR
摘要 PURPOSE: A circuit for inputting phase locked data into two phase locked loop chips is provided, which lock two frequencies using one micro processor in a modulator method using a DSP(Digital Signal Processing). CONSTITUTION: According to a phase locked loop control circuit to output signals having different frequencies each other by controlling two phase locked loops, a ROM stores data to control outputs of the two phase locked loops. A DSP outputs a signal to control two different phase locked loops by receiving data of the ROM, a micro controller signal, phasing data and an initialization signal from the micro processor. A latch stores and outputs a signal of the DSP. A divider outputs a clock signal by dividing a signal from a buffer amplification circuit 1, and a FIFO receives 12 bit data information from the divider and the DSP. A digital-analog converter converts a digital output of the FIFO into an analog modulation signal of 100kHz. A synthesizer generates 90MHz signal by synthesizing the outputs of a buffer amplification circuit 2 and the digital-analog converter. An amplifier amplifies an output of the synthesizer, and a band pass filter passes only the 90MHz signal among the amplified signal, and an amplifier amplifies the 90MHz signal.
申请公布号 KR100285720(B1) 申请公布日期 2001.01.05
申请号 KR19970081465 申请日期 1997.12.31
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KWON, HYEOK JIN
分类号 H04L27/00;(IPC1-7):H04L27/00 主分类号 H04L27/00
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