发明名称 METHOD FOR FORMING INTERMETALLIC DIELECTRIC LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an intermetallic dielectric layer of a semiconductor device is provided to fill enough a gap between metallization patterns under a lower radio frequency power. CONSTITUTION: A metallization thin layer(12) is deposited on a lower layer(11) and then patterned. Next, a TEOS(TetraEthylOrthoSilicate) liner layer(13) is deposited on an overall surface. Thereafter, to fill a gap between the metallization patterns(12), an oxide layer(14) is formed on the TEOS liner layer(13) by using high density plasma(HDP) chemical vapor deposition under lower argon gas supply. Particularly, the argon gas is supplied with a flow rate in a range of 40 to 60 sccm(Standard Cubic Centimeter per Minute). The lower argon gas supply results in a reduction in etch rate and a drop in etch/deposition ratio. Finally, an insulating layer(15) is formed and then planarized on the oxide layer(14).
申请公布号 KR20010001768(A) 申请公布日期 2001.01.05
申请号 KR19990021194 申请日期 1999.06.08
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 KWON, YEONG MIN
分类号 H01L21/31;(IPC1-7):H01L21/31 主分类号 H01L21/31
代理机构 代理人
主权项
地址