DRAM CELL ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF

摘要

First trenches and second trenches (G2) which run perpendicular thereto and are divided into word line trenches and isolation trenches are provided in a substrate (1). The word line trenches are respectively filled with a word line (W) and a protective structure (S) arranged thereover. Transistor source/drain areas (S/D1, SD/2) are disposed in an adjacent position to a surface (F) of the substrate and protrude into the substrate (1) to a lesser degree than the word lines (W). A common source/drain area (SD1) which is connected to a bit line (B) is shared between two adjacent transistors. The remaining source/drain areas (S/D2) of the transistors are connected to capacitors (Ko).