| 摘要 |
Aspects for deprocessing of a flip-chip, multi-layer integrated circuit from the backside are described. In an exemplary method aspect, the method includes reducing a first backside layer of the multi-layer integrated circuit to a predetermined thickness, and exposing an active region of the multi-layer integrated circuit to allow device analysis of the multi-layer integrated circuit. The method further includes removing a metal layer beneath the active region to expose interlayer dielectric material, performing a bulk delayering of the interlayer dielectric material to expose a next metal layer, and continuing to delayer the multi-layer integrated circuit layer-by-layer from the backside for analysis of the multi-layer integrated circuit.
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