发明名称 A PARALLEL ANALOG-TO-DIGITAL CONVERTER
摘要 In a parallel ADC device a number of ADCs (131, 132, 133, 134) work in parallel, the conversion processes in each ADC overlapping the processes in the other ADCs. The number of ADCs and the sampling period at which samples are taken and new conversion processes are periodically started in the ADCs are selected so that at each instant at least ADC (135) is idling not performing any conversion. After the conversion made by one of the ADCs, a choice is made whether the next sampled value is to be converted by this ADC or by the idling, extra ADC. This choice can be made in a random or a pseudo-random way. By such choices of the next element device to make a conversion of a sampled value a distortion pattern which comprises undesired tones and would exist in the composite output signal of the parallel ADC device having no extra ADC is transformed to noise, since the error in the output signal caused by differences in the conversion characteristics of the ADCs is by the choosing process distributed in the frequency domain.
申请公布号 WO0079684(A1) 申请公布日期 2000.12.28
申请号 WO2000SE01322 申请日期 2000.06.21
申请人 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) 发明人 EKLUND, JAN, ERIK
分类号 H03M1/12;H03M1/06 主分类号 H03M1/12
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