| 摘要 |
The present invention provides a digital channelizer/de-channelizer architecture that, with a minimum amount of hardware, is capable of dynamically adapting to changing system requirements. According to exemplary embodiments of the present invention, the digital channelizer/de-channelizer, which is applied with a modified fast convolution algorithm, includes a plurality of dedicated, optimized, pipeline modules that may be dynamically adjusted for handling different bandwidths, a flexible number of channels, simultaneous multiple standards and a dynamic allocation of channels and standards.
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