发明名称 |
Halbleiterbauelement mit Antifuse-Elektrodenanordnung und Verfahren zu seiner Herstellung |
摘要 |
The semiconductor substrate (101) carries two electrodes (102, 106) to which voltage is applied and forms a transition from a high resistance to a low one between both electrodes. The electrode assembly contains a region of amorphous silicon (105). The electrode assembly is a four-layer lamination with a top electrode (106), the amorphous silicon region, a silicon insulating film (107), and a lower electrode. The lower electrode pref. consists of a dopant diffusion zone on the semiconductor substrate surface. Alternately, it is formed by a polycrystalline silicon. The amorphous silicon typically contains a dopant of the group III. USE/ADVANTAGE - For data memories, with resistance value equaling that of insulating material. |
申请公布号 |
DE3927033(C2) |
申请公布日期 |
2000.12.21 |
申请号 |
DE19893927033 |
申请日期 |
1989.08.16 |
申请人 |
SEIKO EPSON CORP., TOKIO/TOKYO |
发明人 |
NAKAZAKI, YASUNORI;HIRAKAWA, KAZUKI |
分类号 |
H01L23/525;H01L29/861;(IPC1-7):H01L45/00;H01L27/112;H01L21/768 |
主分类号 |
H01L23/525 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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