发明名称 Transmission system and interface and interface device between a parallel bus system and a transmitter/receiver
摘要 <p>A shift device (12) separates even and odd bits streams (13,14) of an input data for activating an internal clock by their different leading edges. A comparison device (15) compares the even and odd bits sequences and recovers from it a second signal. A recovery device (16) recovers from an input sequence a first data signal. Independent claims are included for: (a) a transmitter of data (b) a data transmission system</p>
申请公布号 EP1061453(A1) 申请公布日期 2000.12.20
申请号 EP20000202011 申请日期 2000.06.07
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 DE VRIES, MAARTEN
分类号 H04L25/02;G06F13/20;G06F13/42;H04L7/00;(IPC1-7):G06F13/42 主分类号 H04L25/02
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