Synchronization element for converting an asynchronous pulse signal into a synchronous pulse signal

摘要

A synchronization element for converting an asynchronous pulse signal into a synchronous pulse signal with reference to a clock signal according to the invention. The synchronization element has four flip-flops consisting of a first flip-flop, a second flip-flop, a third flip-flop and a fourth flip-flop, two AND gates, an NAND gate and an inverter. The first flip-flop can capture the rising edges of an input signal. The second and third flip-flops can generate a pulse signal synchronous to the reference clock signal according to whether or not the first flip-flop is latched. The fourth flip-flop is used to reset the other flip-flops. The NAND and One of the two AND gates can generate appropriate control signals to control corresponding signals.