| 摘要 |
A delay circuit is provided for delaying signals. The delay circuit includes: at least one inverter having a time delay; at least one current source coupled to the at least one inverter, the at least one current source providing charging current to the at least one inverter; and a voltage biasing circuit coupled to the at least one current source, the voltage biasing circuit providing a biasing voltage to the at least one current source such that the at least one current source varies the charging current so as to maintain the time delay of the at least one inverter substantially constant.
|
