| 摘要 |
PROBLEM TO BE SOLVED: To provide a high speed operation by intervening a source follower type logic circuit between an input logic circuit which outputs a logical signal with an upper limit value as a potential higher than a power source potential and a lower limit value as a potential higher than a ground potential and an output driver which outputs a logical signal with an upper limit value as the power source potential and a lower limit value as the ground potential. SOLUTION: Since a source follower type logic circuit 18 is intervened between a pseudo-nMOS circuit 11 and a CMOS inverter 22, it is possible to shift a center potential of an output logical signal of the pseudo-nMOS circuit 11 in a ground potential direction even if a lower limit value of the output signal of the pseudo-nMOS circuit 11 is raised and an amplitude of the output logical signal of the pseudo-nMOS circuit 11 is made smaller. Therefore, even if a circuit threshold of a CMOS inverter 22 is lower than the central potential of the output logical signal of the pseudo-nMOS circuit 11, it is possible to have the CMOS inverter 22 operate so that a rising time and a lowering time becomes equal to each other.
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