发明名称 SAMPLE HOLD CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a sample hold circuit using a switch capable of sufficiently reducing the distortion of an output signal even if reducing a power supply voltage. SOLUTION: A plurality of different reference voltages VrefN are set, and when the voltage of an analog input signal 1 is beyond each reference voltage, a corresponding unit switch 11e is turned on. Thus, the corresponding unit switch 11e is turned on, based on a compared result from each comparator circuit 13e, according to the voltage value of the analog input signal 1 so that the dependency of the voltage of the analog input signal on an on resistance value can be relaxed.
申请公布号 JP2000353958(A) 申请公布日期 2000.12.19
申请号 JP19990163928 申请日期 1999.06.10
申请人 MITSUBISHI ELECTRIC CORP 发明人 SHIGENOBU TAKESHI;ITO MASAO;KUMAMOTO TOSHIO
分类号 H03M1/34;G11C27/02;H03K5/08;(IPC1-7):H03M1/34 主分类号 H03M1/34
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