发明名称 Memory testing
摘要 <p>An apparatus and method for determining the minimum clock delay first of all determines the response time of the overall circuit by varying the application instant of an external clock until the circuit output is just valid. Then an external senseamp clock is substituted for the internal senseamp clock and the instant of application of the external clock is again varied until the circuit output is just valid. <IMAGE></p>
申请公布号 EP1061528(A1) 申请公布日期 2000.12.20
申请号 EP20000302825 申请日期 2000.04.04
申请人 STMICROELECTRONICS LIMITED 发明人 NURSER, HENRY
分类号 G11C29/50;(IPC1-7):G11C29/00 主分类号 G11C29/50
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