Memory expansion circuit for ink jet print head identification circuit

摘要

An ink jet print head identification system for providing print head identifying information to the electronics of an ink jet printer includes one or more parallel load, serial out, dynamic shift registers integrated into a print head chip having a plurality of address lines interconnecting the printer electronics and the print head electronics. The memory input of each shift register is electrically connected to a memory matrix that supplies digital bits of information to the shift register in response to receiving a decode signal function from the printer electronics. In a preferred embodiment, two of the address lines provide each of the registers with successive sequential clock signals to serially shift the bit of information received from the shift register's corresponding memory matrix to an output line where the print head identifying information is read by the printer electronics. Embodiments of the invention may employ any number of shift registers and memory matrices independent of the number of available address lines.