Methods and apparatus for providing multi-processor access to shared memory

摘要

A multi-processor interface is described having two processors. The first processor lacks a ready input and is continuously operating. The two processors share a memory, where the operation of the second processor is suspended when it requests memory access while the first processor has memory access. The multi-processor interface also includes a bus arbiter which selectively connects the memory to the first or second processor. The bus arbiter suspends operation of the second processor when the second processor requests memory access while the first processor has memory access.