发明名称 Current-mode controller for switching DC/DC converter having a reduced output ripple current
摘要 A switch arranged between a DC power supply source and a load is driven depending on the state of a flip-flop circuit. An error amplifier outputs an instruction value signal determined based on an output voltage. A comparator outputs a first reset signal when an inductor current reaches the instruction value signal. An oscillator generates a set pulse. A first AND gate feeds as a second reset signal an AND-operation result between the Q-output of the flip-flop circuit and the first reset signal to the reset terminal of the flip-flop circuit and the negative logic input terminal of a second AND gate. The second AND gate feeds the set pulse to the set terminal of the flip-flop circuit according to the second reset signal.
申请公布号 US6163142(A) 申请公布日期 2000.12.19
申请号 US19990348588 申请日期 1999.07.06
申请人 KABUSHIKI KAISHA TOYODA JIDOSHOKKI SEISAKUSHO 发明人 TSUJIMOTO, HIROKAZU
分类号 H02M3/155;H02M3/158;(IPC1-7):G05F1/40 主分类号 H02M3/155
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