发明名称 ELASTIC STORAGE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce a circuit scale by providing an up/down counter which is up/down-controlled by the lowest bits of a reading address and a writing address as a means detecting a distance difference between the reading address and the writing address. SOLUTION: An up/down counter 15 inputs the lowest bit 221 of a writing address 112 as a count-up instruction signal, inputs the lowest bit 211 of a reading address 21 as a count down instruction signal and outputs the distance of both addresses as a counter output value. When a distance detection part 16 detects that the counter output value of the up/down counter 15 reaches a minimum regulated value or maximum regulated value which is previously decided, it judges an error state, transmits an initializing signal 23 and makes a reading address generation circuit 11 and a writing address generation circuit 12 return to an initial state. The distance detection part 16 transmits an alarm signal 24.
申请公布号 JP2000353075(A) 申请公布日期 2000.12.19
申请号 JP19990164668 申请日期 1999.06.11
申请人 NEC CORP 发明人 YOSHINAGA KOTARO
分类号 G06F12/02;G06F5/06;G06F5/10;G06F5/12;G11C7/00;H04L13/08 主分类号 G06F12/02
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