| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent erroneous read-out by suppressing the variation of threshold voltage of a memory cell caused by disturbance of a substrate at the time of erasing operation. SOLUTION: At the time of erasing operation of a selection block BLOCK0, first positive voltage +3 V is applied to word lines WL32-WL63 of a non- selection block BLOCK1, while reference voltage 0 V is applied to sub-bit lines SBL11, SBL13,... SBL14095. A memory cell in which threshold voltage in the non-selection block BLOCK1 is low state is turned on, and a channel layer formed on the memory cell being turned on is made reference voltage 0 V. And the first positive voltage +3 V is applied to a control gate connected to the word lines WL32-WL63, potential difference between the control gate (+3 V) and the channel layer (0 V) is made small, an electric field between a floating gate and the channel layer is reduced, and a substrate disturbance is relaxed.</p> |
