| 摘要 |
PROBLEM TO BE SOLVED: To provide a computer system in which both a superscaler mode and a VLIW mode are dealt with by instruction scheduling and data dependency between different instruction scan can be processed. SOLUTION: An instruction in a computer system is executed by plural parallel execution pipelines 13 to 16, checks 39 and 42 of dependency in the same row direction are supplied to the parallel pipelines 13 to 16, are executed between other instructions and, moreover, in response to the dependency in the same row direction to be detected, a control signal of a first or a second type is generated by depending upon whether or not the dependency can be released or not by activating a bypass or whether or not a temporary section is obtained for one of the pipelines. |
