| 摘要 |
PROBLEM TO BE SOLVED: To simplify the circuit and realize a low cost by directly obtaining a digitized track error signal value from the detection result of a phase difference obtained by all of the digital signal processing on and after the processing of level comparators, bordering the level comparators for binarization after analog signal processing. SOLUTION: Analog signals 105, 106 emphasized in a high frequency region by equalizers 103, 104 have high amplitudes enough to be binarized by next stage comparators 107, 108. The binarized signals 109, 110 are inputted to a phase comparator 111, and the phase error pulses 112, 113 of the two signals are inputted to a counter 2. A detection cycle timer 3 is arranged so as to output a reference pulse 5 when a count value reaches a certain value, and an output control register 4 fetches into own register the count value 6 received from the counter 2 when the reference pulse 5 becomes high-level.
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