发明名称 CIRCUIT FOR DETECTING MROM LEAK DEFECT, AND MROM MIXED CHIP
摘要 <p>PROBLEM TO BE SOLVED: To easily detect a defective MROM in a short time without missing a defective MROM by controlling a group of transistors constituting an MROM to the prescribed state in accordance with kinds of test, and taking out a signal detecting that leak is caused in one part of the group of transistors. SOLUTION: During a period of performing a NOP instruction of a CPU, DC leakage defect detecting measurement is performed. After a MROM mixed chip is turned into a test mode and a pre-charge transistor 3a, a column select- transistor 3b, a cell selector transistor 3c, and a ROM cell transistor 3d are fixed in the prescribed state, leakage is detected by a leak detecting circuit provided in a MROM circuit 3, and this is outputted to the outside from a flag output circuit. Therefore, off-leakage measurement of various transistors in the MROM circuit 3 can be performed by DC voltage, it can be discriminated by one monitor terminal of a port circuit sharing a monitor whether leakage defect of MROM 16 bits exists or not.</p>
申请公布号 JP2000353400(A) 申请公布日期 2000.12.19
申请号 JP19990163120 申请日期 1999.06.09
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 OIKAWA KIYOHARU
分类号 G11C17/00;G06F12/16;G11C29/00;G11C29/02;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C17/00
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