发明名称 BIAS CIRCUIT FOR SERIES CONNECTION DECOUPLING CAPACITOR
摘要 PROBLEM TO BE SOLVED: To improve a power source of a dynamic random access memory by connecting a bias voltage source to an array of a memory cell in a node, and keeping a voltage level in the node at a lower level than a voltage level of a power source. SOLUTION: A bias circuit 24 is connected to a node 26 between array capacitors 20 and 22. The bias circuit 24 gives a bias voltage source keeping an average value of voltage VA in the series connection node 26 at an approximately half of the magnitude of a supply power source in a node 12, and guarantees that the maximum voltage applied to either of the array capacitor 20 or 22 does not exceed the maximum voltage in the specification of the capacitor. In this bias circuit 24, power can be supplied from a decoupled circuit 24. Therefore, when one of capacitors has a defective leak current, the bias circuit 24 limits the voltage of either of the capacitors 20 or 22 to a breakdown voltage or less.
申请公布号 JP2000353386(A) 申请公布日期 2000.12.19
申请号 JP20000121557 申请日期 2000.04.21
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 RUSSELL J HORTON;MILLER CHRISTOPHER P
分类号 G11C11/407;G05F3/24;G11C11/4074;H01L21/822;H01L27/04;(IPC1-7):G11C11/407 主分类号 G11C11/407
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