| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device whose power consumption is low. SOLUTION: In this nonvolatile semiconductor memory device as a NAND-type flash memory, a VPGM generation circuit 2, a Vpass generation circuit 3 a P5V generation circuit, a word-line-voltage generation circuit, a Vpp generation circuit 4, a subrow decoder 5 and a main row decoder 6 are provided. In a write operation a step-up clock signal which is used for a step-up operation in a step-up circuit for the Vpp generation circuit 4 used to generate a step-up voltage at a VPGM level, the subrow decoder 5 and the main row decoder 6 is controlled in synchronization with a step-up clock signal used for a step-up operation in the VPGM generation circuit 2. A step-up clock signal used for a step-up operation in a step-up circuit for the subrow decoder 5 used to generate a step-up voltage at a Vpass level is controlled in synchronization with a step-up clock signal used for a step-up operation in the Vpass generation circuit 3. In a read operation, in a verification operation a step-up clock signal used for a step-up operation in a step-up circuit for the Vpp generation circuit 4 used to generate a step-up voltage at a P5V level, the subrow decoder 5 and the main row decoder 6 is controlled in synchronization with a step-up clock signal used for a step-up operation in the P5V generation circuit.</p> |
