发明名称 SEMICONDUCTOR DEVICE AND WIRING CIRCUIT DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To improve the yield of a wiring board which is to be mounted with an LSI of high integration. SOLUTION: As to a land pattern on a wiring boards which is mounted with a high-integration LSI, an interlayer connection hole arrangement for a power supply and a grounding is arranged outside of a signal interlayer connection hole arrangement. That is, interlayer connection holes 55 and 56 which are each connected to a power supply land pattern 53 and a grounding land pattern 54 out of land patterns 53, 54, and 58 that are laid inside are gathered and arranged so as to be located outside of an arrangement pattern of interlayer connection holes 59 which are each connected to the signal lands 58.</p>
申请公布号 JP2000349191(A) 申请公布日期 2000.12.15
申请号 JP19990158391 申请日期 1999.06.04
申请人 TOSHIBA CORP 发明人 KAJI KENJI
分类号 H05K1/11;H01L23/12;H05K3/34;(IPC1-7):H01L23/12 主分类号 H05K1/11
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