发明名称 CACHE MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To load a word in order of a requested address, to successively load a word coming under the next block in the case of reaching a block boundary and to complete the loading of residual words in the initially loaded block when the successive loading is completed. SOLUTION: A load address controlling part 107 controls a block address generating part 108 so as to generate a block address corresponding to the next block to be loaded at a cache error hit from the number of blocks given from a load number of blocks storing part 104 and a wrap around signal 120 from a processor requesting to load data in order of wrap around extending over a plurality of blocks at cache error hit. A word address generating part 109 generates a word address corresponding to a word to be next loaded and notifies the part 107 that the word address becomes the final word address in the block.
申请公布号 JP2000347934(A) 申请公布日期 2000.12.15
申请号 JP19990154503 申请日期 1999.06.02
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ZAIKI KOUJI
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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