| 摘要 |
PURPOSE: A high speed Z-buffer circuit using first in first out machine is provided to improve performance of three dimensional graphic by executing motion that reads data from Z-buffer memory during executing pixel interpolation. CONSTITUTION: A Z-address free pitch part(102) calculates Z-address of pixel on a span being transmitted X, Y value from a graphic processor(101), outputs the results at Z-address Q storage part(104) in orders, and stores a page address which is an upper address bit of Z-address in Z-address page resistor(105). A Z-buffer interface logic part(107) reads and writes data from Z-buffer memory(108A-108N) at Z-first in first out machine(103) if it is possible to transmit each other after checking the state of Z-first in first out machine(103) and Z-buffer memory(108A-108N). A first in first out controller(109) checks the state of Z-first in first out machine(103), let other parts know whether it is empty or full and simultaneously generates a write address of Z-first in first out machine(103). A frame buffer interface part(110) is supplied with Z value, and decides a validity and void about WPIX signal comparing new Z value and the previous Z value.
|
