发明名称 SYSTEM AND METHOD FOR CLOCK REPRODUCTION
摘要 PROBLEM TO BE SOLVED: To provide a system and a method for clock reproduction in which high precision of clock reproduction is attained by eliminating a cause for jitter occurrence and precisely following fluctuation of a phase differential. SOLUTION: A clock reproduction system which feeds back a phase differential between an analog demodulation data signal and a clock signal and generates the clock signal is equipped with an A/D converter 2 which oversamples the demodulation data signal and converts it into digital, a data change direction detection circuit 3 which detects a vertical data change direction from a change in sampling data at a peak position, a threshold selection circuit 11 which holds a threshold, decides plus and minus of the sampling data at a zero cross position and selects the threshold, a phase differential detection circuit 4 which compares the sampling data at the zero cross position of the demodulation data signal with the selected threshold and detects the sampling data exceeding the threshold as the phase differential, and a multiplying part 5 which multiplies data in a detected data change direction and data of the detected phase differential and obtains the phase differential.
申请公布号 JP2000349745(A) 申请公布日期 2000.12.15
申请号 JP19990158989 申请日期 1999.06.07
申请人 NEC CORP 发明人 MITSUYA NAOKI
分类号 H03L7/08;H03L7/091;H04L7/033 主分类号 H03L7/08
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