| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor device provided with a PLL circuit that can reduce a lock-in time and ensure a stable operation. SOLUTION: A pulse width adjustment device 5 is provided between a phase comparator 1 and a charge pump 2. The pulse width adjustment device 5 controls a pulse width of a pulse signal from the phase comparator 1 to the charge pump 2 in a way that a comparatively a high current output is given to the charge pump 2 in the case that a phase of a feedback signal CLK is in one state of being lagged or led with respect to an input signal REF and converged, or a comparatively low current output is given to the charge pump 2 in the case that the phase of the feedback signal CLK is transited to the other state of the lead or lag with respect to the input signal REF and made stable in this state. |
