发明名称 |
INCREASING THE AVAILABILITY OF THE UNIVERSAL SERIAL BUS INTERCONNECTS |
摘要 |
A Universal Serial Bus hub circuit includes an upstream port and a plurality of downstream ports. The hub circuit further includes input circuitry via which data received on one of the downstream ports is to be repeated to the upstream port. Asynchronous event detection circuitry is to detect an asynchronous event in the received data for the one downstream port. Port selection circuitry to select the one downstream port. Timer circuitry is to measure a time period from a time that the asynchronous event detection circuitry detects an asynchronous event. Synchronous event detection circuitry is to detect a synchronous event in the received data for the one port. End-of-event generation circuitry generates a simulated end-of-event signal if the detected synchronous event is not before the end of the measured time period, and provides the simulated end-of-event signal to the upstream port. |
申请公布号 |
KR100274666(B1) |
申请公布日期 |
2000.12.15 |
申请号 |
KR19980036173 |
申请日期 |
1998.09.03 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
BRIEF, DAVIF |
分类号 |
G06F11/00;H04L12/403;(IPC1-7):H04L12/40 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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