METHOD FOR MANUFACTURING A BIT LINE OF A MEMORY CELL

摘要

PURPOSE: A method for manufacturing a bit line of a memory cell is provided to eliminate the limit of height of a cell capacitor, by forming the bit line within a shallow trench isolation(STI) in a semiconductor substrate. CONSTITUTION: A trench is formed on a semiconductor substrate(11), and an insulating material is filled in the trench to form a shallow trench isolation(STI)(12A,12B). A part of the STI is etched while a boundary region between the STI and the semiconductor substrate is etched. The etched region is filled with a conductive material(13), so that a bit line and a via contact are simultaneously formed in the boundary region and a bit line is formed within the STI. The second and third gates separated a predetermined interval from each other are formed on the semiconductor substrate on both sides of the bit line while the first and fourth gates separated from the second third gates are built across the semiconductor substrate and STI.