ADDRESS EXTENSIBLE DATA PROCESSING SYSTEM

摘要

PURPOSE: An address extensible data processing system is to provide a microprocessor of a von Neumann structure which can access an extended data memory. CONSTITUTION: An instruction register(106) stores instructions inputted from a memory device(200) through a data bus(DB£7:0|) in a fetch step. An instruction decoder(104) decodes the instructions stored in the instruction register(106) and outputs addresses corresponding to the instructions in an execution step. A programmable control unit(102) outputs control signals corresponding to the addresses inputted from the instruction decoder(104). A register file(110) is a group of registers to temporarily store data or addresses. An interrupt controller(112) carries out the overall interrupt control of a microprocessor(100) in response to interrupt signals inputted from the external. An arithmetic logic unit(114) receives the control signals from the programmable control unit(102) and the data or addresses from the decoder(104) and carries out arithmetic logic operation. An extra address interface(120) is comprised of an extra program counter, an extra data address counter, a multiplexer and a latch circuit.