发明名称 PROCESSOR, EMULATOR AND EXAMINING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To trace internal information without developing a processor for debugging by outputting trace data as analog data. SOLUTION: A processor 2 has a D/A converter 3 for inputting a signal to be traced. A trace control part 4 is composed of an A/D converter 5 for inputting the output of the D/A converter 3 from the processor 2, a trace memory 6 for writing the digital output of the A/D converter 5 and a timing control circuit 7 for controlling the trace memory. The D/A converter 3 performs D/A conversion synchronously with a timing control signal 9 and outputs the preceding D/A conversion result as an analog signal. The A/D converter 5 of the trace control part 4 similarly performs A/D conversion synchronously with the timing control signal 9 and outputs the result. The timing control circuit 7 writes trace data restored into digital data into the trace memory by generating a write signal to the trace memory 6 corresponding to the output of the A/D converter 5.</p>
申请公布号 JP2000347897(A) 申请公布日期 2000.12.15
申请号 JP19990156160 申请日期 1999.06.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMASHITA TAKIO
分类号 G06F11/28;G06F15/78;(IPC1-7):G06F11/28 主分类号 G06F11/28
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