发明名称 METHOD AND DEVICE FOR GENERATING TEST PATTERN OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To greatly save the time and trouble for test pattern generation. SOLUTION: A macro common test pattern is written to a storage part 21, a conversion library for a CPU series is previously stored in a storage part 22, and a parameter file for product is stored in a storage part 23. A test pattern converter 26 reads data for conversion out of the conversion library for CPU series according to a CPU series name inputted from an operation part 25 and reads data for conversion out of the parameter file for product according to a type number inputted from the operation part 25. Then the macro common test pattern is read out of the storage part 21 in sequence and converted with the above-mentioned data for conversion to generate a macro test pattern for product, which is written to a storage part 27.
申请公布号 JP2000347890(A) 申请公布日期 2000.12.15
申请号 JP19990155764 申请日期 1999.06.02
申请人 NEC CORP 发明人 OTSUKA SHIGEKAZU
分类号 G01R31/28;G01R31/3183;G01R31/3185;G06F11/22;G06F11/263;G11C29/00;H01L21/82 主分类号 G01R31/28
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