发明名称 |
SEMICONDUCTOR TESTING APPARATUS |
摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor testing apparatus which shortens the time required for judging whether the defective bit of a semiconductor memory can be relieved or not and which reduces the memory capacity of a defective-bit storage memory. SOLUTION: In this semiconductor testing apparatus, a row defective-bit storage memory 3 which corresponds to a spare row circuit and a column defective-bit storage memory 5 which corresponds to a space column circuit are installed separately, and defective bits of the defective-bit storage memories are counted respectively by a row defective-bit counter 4 and a column defective-bit counter 6. Whether a defective row can be relieved or not and whether a defective column can be relieved are judged by using the row defective-bit storage memory and the column defective-bit storage memory.
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申请公布号 |
JP2000348498(A) |
申请公布日期 |
2000.12.15 |
申请号 |
JP19990160860 |
申请日期 |
1999.06.08 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
HAMADA MITSUHIRO;OTANI JUN |
分类号 |
G11C29/44;G11C29/00;G11C29/56;(IPC1-7):G11C29/00 |
主分类号 |
G11C29/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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