FABRICATION METHOD OF CMOS DEVICE WITH SELF-ALIGNED SOURCE/DRAIN

摘要

PURPOSE: A method for manufacturing a self-aligned source/drain CMOS device is provided to improve an operating speed of a CMOS by removing a defect of a grain. CONSTITUTION: A field oxide layer(52), an isolation oxide layer(53), a polysilicon(54), and a chemical deposition oxide layer are formed on a substrate(51). A self-aligned source/drain pattern is formed by etching the chemical deposition oxide layer, the polysilicon(54), and the isolation oxide layer(53). A polysilicon or amorphous silicon is formed on a source/drain region. A nitride layer is deposited thereon. A sidewall spacer nitride layer is formed by etching the nitride layer. All parts except for the polysilicon is oxidized by using the sidewall nitride layer. A thermal oxide layer is grown and etched. A gate oxide layer is formed on the result material. A self-aligned source/drain(62) is completed by applying a polysilicon(61) thereon.