INPUT OUTPUT CIRCUIT FOR HIGH SPEED SEMICONDUCTOR MEMORY DEVICE REDUCING TEST TIME

摘要

PURPOSE: An input/output circuit is provided to reduce the time to test a built-in memory. CONSTITUTION: An input/output circuit(201) includes the first - eight pads(P0-P7) for inputting/outputting signals with the outside. A memory(211) stores data. The first - eight input/output units(221-228) are electrically connected to the pads(P0-P7). The first - four data buses(B0-B3) are electrically connected to the pads(P0-P7). The first - eight multiplexers(241-248) are electrically connected to one of the input/output units(221-228) and the data buses(B0-B3). The first - eight multiplexers(241-248) write data inputted from the data buses(B0-B3) into the memory(211) upon a direct access test mode of testing the memory(211) and also write data inputted from the input/output unit(221-228) into the memory(211) upon a normal mode.