ALIGNMENT MARK FOR AN EXPOSURE EQUIPMENT OF A SEMICONDUCTOR DEVICE

摘要

PURPOSE: An alignment mark for an exposure equipment of a semiconductor device is provided to prevent a coating characteristic of a resist layer coated on an alignment mark pattern, by inserting a plurality of alignment mark patterns having a small dimension in a hole pattern between alignment mark patterns having a large dimension. CONSTITUTION: An alignment mark(30) for an exposure equipment of a semiconductor device comprises the first alignment mark pattern group(31) and the second alignment mark pattern group(32). The first alignment mark pattern group has a plurality of alignment mark patterns having a broad dimension. The second alignment mark pattern group is formed between the first alignment mark patterns and in a periphery of the first alignment mark patterns.