| 摘要 |
<p>PROBLEM TO BE SOLVED: To output a transport stream having no conflict in terms of time by generating a clock of the frequency that is calculated from a reciprocal of the single round time of a transport stream packet via a clock generating part. SOLUTION: A clock generating part 1 has a synthesizer 10 and generates clocks. A programmable address counter 2 outputs an address for every clock of the part 1. A memory 3 stores a transport stream packet for every address and outputs the transport stream packet according to the address of the counter 2. A CPU 4 includes a setting means 40 and is connected to the part 1, the counter 2 and the memory 3 to control them. The means 40 sets the frequency that is calculated from one to the single round time of the transport stream packet of the memory 3 to the synthesizer 10 of the part 1.</p> |
