INTERNAL OPERATION VOLTAGE GENERATION CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: An internal operation voltage generation circuit of a semiconductor memory device is provided which can reduce the current consumption in a power-down mode by controlling the internal operation voltage in power-down to be lower than the internal operation voltage in normal operation. CONSTITUTION: An internal operation voltage generation circuit of a semiconductor memory device comprises: a comparison unit(20) which has a differential amplification structure and compares the size of a reference voltage applied through the first input terminal with the size of a distribution voltage applied through the second input terminal and generates a comparison output voltage corresponding to the compared result; a driving unit(22) which is driven in response to the comparison output voltage and outputs the driven result as an internal operation voltage; a voltage distribution unit(24) which is realized by K(<N) transistors which form the first resistance component by being connected between the internal operation voltage and the distribution voltage, and N-K transistors which form the second resistance component by being connected between the distribution voltage and a ground, and distributes the internal operation voltage and outputs the distributed voltage as a distribution voltage; and a resistance conversion unit(26) which converts to increase or to decrease the first resistance component or the second resistance component in response to a power-down enable signal, and varies the internal operation voltage in response to the converted result. The circuit can reduce the current consumed in the power-down mode by controlling the internal operation voltage in the power-down mode to be lower than that in the normal mode.