摘要 |
A D/A conversion circuit for supplying a gradation voltage corresponding to an inputted n-bit digital signal to an output line, n being a natural number not less than 2, the D/A conversion circuit comprising: means for dividing the n-bit digital signal into upper x bits and lower y bits, wherein x + y = n and both x and y are natural numbers; a first D/A conversion circuit adapted to select adjacent two gradation voltage lines from (2<x> + 1) gradation voltage lines (V0-V15) according to the upper x bits of the n-bit digital signal; a second D/A conversion circuit adapted to generate 2<y> gradation voltages from gradation voltages of the two selected adjacent gradation voltage lines and to supply one of the generated 2<y> gradation voltages selected according to the lower y bits of the n-bit digital signal to the output line; characterized in that the first D/A conversion circuit comprises a plurality of circuits, each of the circuits comprising a first circuit with x P-channel TFTs (Tr3.3, Tr3.4, Tr2.3, TR2.4, Tr1.3, Tr1.4, Tr0.3, Tr0.4) connected in series to each other and x N-channel TFTs (Tr3.1, Tr3.2, Tr2.1, Tr2.2, Tr1.1, Tr1.2, Tr0.1, Tr0.2) connected in series to each other, the x P-channel TFTs (Tr3.3, Tr3.4, Tr2.3, TR2.4, Tr1.3, Tr1.4, Tr0.3, Tr0.4) being arranged in a row and the x n-channel TFTs (Tr3.1, Tr3.2, Tr2.1, Tr2.2, Tr1.1, Tr1.2, Tr0.1, Tr0.2) being arranged in a row, the first and the second circuit being connected in series to each other and each of the circuits being connected in parallel to one of the 2<x> + 1 gradation voltage lines. <IMAGE> |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
KOYAMA, JUN;OSAME, MITSUAKI;TANAKA, YUKIO;AZAMI, MUNEHIRO;OKABE, NAOKO;NAGAO, SHOU |