发明名称 |
Microprocessor having fuse control and selection of clock multiplier |
摘要 |
A microprocessor is provided having selective control features to determine its core-to-bus clock ratio. The microprocessor includes a fuse and buffer/control logic. The fuse, fabricated on the microprocessor's metalization or poly layer, can be blown with a laser during fabrication. When blown, the fuse provides a permanent state that prescribes a fixed core-to-bus clock ratio. The buffer/control logic is coupled to the fuse. The buffer/control logic accepts the permanent state and directs the microprocessor to set the core-to-bus clock ratio to a fix value, thus disabling control of the core-to-bus clock ratio via external clock ratio control signals.
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申请公布号 |
US6161188(A) |
申请公布日期 |
2000.12.12 |
申请号 |
US19980193303 |
申请日期 |
1998.11.17 |
申请人 |
IP-FIRST, L.L.C. |
发明人 |
GASKINS, DARIUS D.;HENRY, G. GLENN |
分类号 |
G06F1/08;(IPC1-7):G06F1/04 |
主分类号 |
G06F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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