发明名称 Programmable logic architecture incorporating a content addressable embedded array block
摘要 The invention relates to an integrated circuit that can be configured to operate as a content addressable memory. The integrated circuit includes a first functional block that stores at least one keyword dataword which is associated with a group of associated data words. The integrated circuit also includes a second functional block that stores the group of associated datawords. The second functional block is connected to the first functional block in such a way that if a request dataword received at the first functional block matches at least one keyword dataword stored therein, then an associated result dataword included in the group of associated data words stored in the second functional block is output by the second functional block. Typically, the integrated circuit chip is a complex programmable logic device architecture (CPLD).
申请公布号 US6160419(A) 申请公布日期 2000.12.12
申请号 US19980167220 申请日期 1998.10.06
申请人 发明人
分类号 G11C7/10;G11C15/00;H03K19/177;(IPC1-7):H01L25/00;G06F7/38 主分类号 G11C7/10
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